Espressif Systems /ESP32-P4 /SPI0 /SPI_MEM_AXI_ERR_RESP_EN

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Interpret as SPI_MEM_AXI_ERR_RESP_EN

Description

SPI0 AXI error response enable register

Fields

SPI_MEM_AW_RESP_EN_MMU_VLD	Set this bit to enable AXI response function for mmu valid err in axi write trans.
SPI_MEM_AW_RESP_EN_MMU_GID	Set this bit to enable AXI response function for mmu gid err in axi write trans.
SPI_MEM_AW_RESP_EN_AXI_SIZE	Set this bit to enable AXI response function for axi size err in axi write trans.
SPI_MEM_AW_RESP_EN_AXI_FLASH	Set this bit to enable AXI response function for axi flash err in axi write trans.
SPI_MEM_AW_RESP_EN_MMU_ECC	Set this bit to enable AXI response function for mmu ecc err in axi write trans.
SPI_MEM_AW_RESP_EN_MMU_SENS	Set this bit to enable AXI response function for mmu sens in err axi write trans.
SPI_MEM_AW_RESP_EN_AXI_WSTRB	Set this bit to enable AXI response function for axi wstrb err in axi write trans.
SPI_MEM_AR_RESP_EN_MMU_VLD	Set this bit to enable AXI response function for mmu valid err in axi read trans.
SPI_MEM_AR_RESP_EN_MMU_GID	Set this bit to enable AXI response function for mmu gid err in axi read trans.
SPI_MEM_AR_RESP_EN_MMU_ECC	Set this bit to enable AXI response function for mmu ecc err in axi read trans.
SPI_MEM_AR_RESP_EN_MMU_SENS	Set this bit to enable AXI response function for mmu sensitive err in axi read trans.
SPI_MEM_AR_RESP_EN_AXI_SIZE	Set this bit to enable AXI response function for axi size err in axi read trans.

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